Abstract
The main objective of this project is to understand the concept of stereo sound enhancement techniques and implement a stereo sound enhancement algorithm on Altera FPGA board. The algorithm I have implemented is based on the concept of taking spatial information in audio components and enhanced it using attenuation, delay and filter techniques. I have implemented the algorithm in Matlab with FIR band pass filter and with moving average filter. I have verified the filters functionality with different orders of filter. I have implemented the algorithm in verilog and simulated it using Synopsys-VCS tool. After successful results in verilog simulation, I have implemented the algorithm on Altera FPGA (Cyclone II 2C35) DE2 Board. I have used onboard audio Codec for audio to digital conversion and SDRAM for data storage.