Abstract
PCI Express is the third generation high performance 1/0 bus used to interconnect peripheral devices. The PCI Express has carried forward the most beneficial features from previous generation bus architectures and also has taken the advantages of new developments in the computer design. PCI Express implements a serial, point-to-point type interconnect for two devices and implements a switch based technology to interconnect a large number of devices. Packet based transaction protocol is used to accomplish communication over the serial interconnect. Quality of service features provide differentiated transmission performance for different applications. This project involves the implementation of transaction between PCI Express devices connected through switches. The PCI Express devices implemented will consists of three layers: transaction, data link and physical layer with the Ack/Nak protocol and the switch will be implemented with Quality of service and Flow Control features.