Abstract
Traditionally, encryption key generation for digital systems is done using two techniques: software algorithms and hardware. The problem with both approaches is. that they can be replicated because of their pseudo random nature. Hackers can use software to regenerate the encryption key by understanding and replicating the algorithm used to generate the key. This issue can be addressed by generating a random key that does not follow any pattern or algorithm. This project is proposing a highly effective solution to generate a random encryption key for digital systems, where a hybrid approach is used. The proposed circuit combines both analog and digital parts. The analog domain consists of Chua's circuit with a random noise source. Chua's circuit is an assembly of two capacitors, a resistor and an inductor capable of producing an oscillating waveform and the output is always unique. The addition of noise .to the circuit assures that Chua's circuit is getting excited by a randomized input, which creates a much more random output. Once the key is generated, the data is stored in a digital storage device. The analog part is simulated in PSpice and the digital domain is modeled in Verilog language. The output of the circuit consists of 8-bit digital signals that can be shown in the form of waveforms. The system consists of analog circuit diagram, Verilog code, digital circuit diagram and waveforms to represent the key stored in a memory block. The final outcome of the project is a randomly generated 8-bit encryption key for digital systems.