Abstract
A dual-phase charge-based capacitance measurement technique enables accurate measurement of interconnect parasitic capacitances on integrated circuits (ICs) via a simple test structure. This measurement technique models the capacitor under test as having an unknown parasitic capacitance to the substrate (ground) at each terminal. The technique significantly reduces the effect of these terminal capacitances on the measurement of the capacitor under test, even if they are mismatched. The measurement setup is very simple and does not require any reference capacitor. Another advantage is that the capacitor under test is not required to have a grounded terminal