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An Efficient Hardware Accelerator for HS1-SIV Encryption Algorithm
Conference paper

An Efficient Hardware Accelerator for HS1-SIV Encryption Algorithm

Maththaiya Durai and Behnam S Arad
Proceedings of the 31st International Conference on Computers and Their Applications, pp.51-58
Computers and Their Applications (CATA-2016) : ISCA International Conference, 31st (Las Vegas, Nevada, 04/04/2016 - 04/06/2016)
2016

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